acidportal/lib/TFT_eSPI/Processors/pio_16bit_parallel.pio.h

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2024-08-16 10:24:29 +00:00
// -------------------------------------------------- //
// This file is autogenerated by pioasm; do not edit! //
// 16 bit parallel //
// -------------------------------------------------- //
#pragma once
#if !PICO_NO_HARDWARE
#include "hardware/pio.h"
#endif
// ------ //
// tft_io //
// ------ //
#define tft_io_wrap_target 7
#define tft_io_wrap 20
#define tft_io_offset_block_fill 0u
#define tft_io_offset_start_8 7u
#define tft_io_offset_start_tx 7u
#define tft_io_offset_set_addr_window 10u
static const uint16_t tft_io_program_instructions[] = {
0x98a0, // 0: pull block side 1
0xa027, // 1: mov x, osr
0x80a0, // 2: pull block
0xa047, // 3: mov y, osr
0xb8e1, // 4: mov osr, x side 1
0x7100, // 5: out pins, 32 side 0 [1]
0x1884, // 6: jmp y--, 4 side 1
// .wrap_target
0x98a0, // 7: pull block side 1
0x7100, // 8: out pins, 32 side 0 [1]
0x1807, // 9: jmp 7 side 1
0xf822, // 10: set x, 2 side 1
0xe000, // 11: set pins, 0
0x80a0, // 12: pull block
0x7000, // 13: out pins, 32 side 0
0x0033, // 14: jmp !x, 19
0x98a0, // 15: pull block side 1
0xe001, // 16: set pins, 1
0x7108, // 17: out pins, 8 side 0 [1]
0x19f1, // 18: jmp !osre, 17 side 1 [1]
0x184b, // 19: jmp x--, 11 side 1
0xe001, // 20: set pins, 1
// .wrap
};
#if !PICO_NO_HARDWARE
static const struct pio_program tft_io_program = {
.instructions = tft_io_program_instructions,
.length = 21,
.origin = -1,
};
static inline pio_sm_config tft_io_program_get_default_config(uint offset) {
pio_sm_config c = pio_get_default_sm_config();
sm_config_set_wrap(&c, offset + tft_io_wrap_target, offset + tft_io_wrap);
sm_config_set_sideset(&c, 2, true, false);
return c;
}
#endif